VeriCert - verified logic synthetizer

projects software

chip-design, github, coq-language, logic-synthesis, formal-verification

affine March 23, 2024, 9:40am 1

GitHub

GitHub - ymherklotz/vericert: A formally verified high-level synthesis tool...

A formally verified high-level synthesis tool based on CompCert and written in Coq. - ymherklotz/vericert

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